lscpu - ARMv8 Cortex-A72

Return To ARMv8 Cortex-A72 System Information

Architecture:        aarch64
Byte Order:          Little Endian
CPU(s):              16
On-line CPU(s) list: 0-15
Thread(s) per core:  1
Core(s) per socket:  2
Socket(s):           8
NUMA node(s):        1
Vendor ID:           ARM
Model:               3
Model name:          Cortex-A72
Stepping:            r0p3
CPU max MHz:         2000.0000
CPU min MHz:         700.0000
BogoMIPS:            50.00
L1d cache:           32K
L1i cache:           48K
L2 cache:            1024K
NUMA node0 CPU(s):   0-15
Flags:               fp asimd evtstrm aes pmull sha1 sha2 crc32 cpuid